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Note: Links lead to the DBLP on the Web. Mark D. Hill 65 Min Xu , Rastislav Bodik , Mark D. Hill: A "Flight Data Recorder" for Enabling Full-System Multiprocessor Deterministic Replay. ISCA 2003 : 122-133 64 Milo M. K. Martin , Mark D. Hill, David A. Wood : Token Coherence: Decoupling Performance and Correctness. ISCA 2003 : 182-193 63 Milo M. K. Martin , Pacia J. Harper , Daniel J. Sorin , Mark D. Hill, David A. Wood : Using Destination-Set Prediction to Improve the Latency/Bandwidth Tradeoff in Shared-Memory Multiprocessors. ISCA 2003 : 206-217 62 Alaa R. Alameldeen , Milo M. K. Martin , Carl J. Mauer , Kevin E. Moore , Min Xu , Mark D. Hill, David A. Wood , Daniel J. Sorin : Simulating a $2M Commercial Server on a $2K PC. IEEE Computer 36 (2): 50-57 (2003) 61 Milo M. K. Martin , Daniel J. Sorin , Mark D. Hill, David A. Wood : Bandwidth Adaptive Snooping. HPCA 2002 : 251-262 60 Daniel J. Sorin , Milo M. K. Martin , Mark D. Hill, David A. Wood : SafetyNet: Improving the Availability of Shared Memory Multiprocessors with Global Checkpoint/Recovery. ISCA 2002 : 123- 59 Brian Fields , Rastislav Bodik , Mark D. Hill: Slack: Maximizing Performance Under Technological Constraints. ISCA 2002 : 47-58 58 Carl J. Mauer , Mark D. Hill, David A. Wood : Full-system timing-first simulation. SIGMETRICS 2002 : 108-116 57 Daniel J. Sorin , Manoj Plakal , Anne Condon , Mark D. Hill, Milo M. K. Martin , David A. Wood : Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol. IEEE Transactions on Parallel and Distributed Systems 13 (6): 556-578 (2002) 56 Anastassia Ailamaki , David J. DeWitt , Mark D. Hill: Data page layouts for relational databases on deep memory hierarchies. VLDB Journal 11 (3): 198-215 (2002) 55 Eric Schnarr , Mark D. Hill, James R. Larus : Facile: A Language and Compiler for High-Performance Processor Simulators. PLDI 2001 : 321-331 54 Anastassia Ailamaki , David J. DeWitt , Mark D. Hill, Marios Skounakis : Weaving Relations for Cache Performance. VLDB 2001 : 169-180 53 Milo M. K. Martin , Daniel J. Sorin , Anastassia Ailamaki , Alaa R. Alameldeen , Ross M. Dickson , Carl J. Mauer , Kevin E. Moore , Manoj Plakal , Mark D. Hill, David A. Wood : Timestamp snooping: an approach for extending SMPs. ASPLOS 2000 : 25-36 52 Mark D. Hill: How computer architecture trends may affect future distributed systems: from infiniBand clusters to inter-processor speculation (abstract). PODC 2000 : 6 51 Trishul M. Chilimbi , Mark D. Hill, James R. Larus : Making Pointer-Based Data Structures Cache Conscious. IEEE Computer 33 (12): 67-74 (2000) 50 Anne Condon , Mark D. Hill, Manoj Plakal , Daniel J. Sorin : Using Lamport Clocks to Reason about Relaxed Memory Models. HPCA 1999 : 270-278 49 E. Ender Bilir , Ross M. Dickson , Ying Hu , Manoj Plakal , Daniel J. Sorin , Mark D. Hill, David A. Wood : Multicast Snooping: A New Coherence Method Using a Multicast Address Network. ISCA 1999 : 294-304 48 Trishul M. Chilimbi , Mark D. Hill, James R. Larus : Cache-Conscious Structure Layout. PLDI 1999 : 1-12 47 Mark D. Hill, Anne Condon , Manoj Plakal , Daniel J. Sorin : A System-Level Specification Framework for I/O Architectures. SPAA 1999 : 138-147 46 Anastassia Ailamaki , David J. DeWitt , Mark D. Hill, David A. Wood : DBMSs on a Modern Processor: Where Does Time Go? VLDB 1999 : 266-277 45 Sarita V. Adve , Mark D. Hill: Weak Ordering - A New Definition. 25 Years ISCA: Retrospectives and Reprints 1998 : 363-375 44 Sarita V. Adve , Mark D. Hill: Retrospective: Weak Ordering - A New Definition. 25 Years ISCA: Retrospectives and Reprints 1998 : 63-66 43 Shubhendu S. Mukherjee , Mark D. Hill: The Impact of Data Transfer and Buffering Alternatives on Network Interface Design. HPCA 1998 : 207-218 42 Ioannis Schoinas , Mark D. Hill: Address Translation Mechanisms In Network Interfaces. HPCA 1998 : 219-230 41 Ioannis Schoinas , Babak Falsafi , Mark D. Hill, James R. Larus , David A. Wood : Sirocco: Cost-Effective Fine-Grain Distributed Shared Memory. IEEE PACT 1998 : 40- 40 Shubhendu S. Mukherjee , Mark D. Hill: Using Prediction to Accelerate Coherence Protocols. ISCA 1998 : 179-190 39 Manoj Plakal , Daniel J. Sorin , Anne Condon , Mark D. Hill: Lamport Clocks: Verifying a Directory Cache-Coherence Protocol. SPAA 1998 : 67-76 38 Shubhendu S. Mukherjee , Mark D. Hill: Making Network Interfaces Less Peripheral. IEEE Computer 31 (10): 70-76 (1998) 37 Andrew A. Chien , Mark D. Hill, Shubhendu S. Mukherjee : Design Challenges for High-Performance Network Interfaces - Guest Editors' Introduction. IEEE Computer 31 (11): 42-44 (1998) 36 Mark D. Hill: Multiprocessors Should Support Simple Memory-Consistency Models. IEEE Computer 31 (8): 28-34 (1998) 35 Yuanyuan Zhou , Liviu Iftode , Jaswinder Pal Singh , Kai Li , Brian R. Toonen , Ioannis Schoinas , Mark D. Hill, David A. Wood : Relaxed Consistency and Coherence Granularity in DSM Systems: A Performance Evaluation. PPOPP 1997 : 193-205 34 David A. Wood , Mark D. Hill, James R. Larus : The Tempest approach to distributed shared memory. ICCD 1996 : 63- 33 Shubhendu S. Mukherjee , Babak Falsafi , Mark D. Hill, David A. Wood : Coherent Network Interfaces for Fine-Grain Communication. ISCA 1996 : 247-258 32 Sashikanth Chandrasekaran , Mark D. Hill: Optimistic Simulation of Parallel Architectures Using Program Executables. Workshop on Parallel and Distributed Simulation 1996 : 143-150 31 Mark D. Hill, James R. Larus , David A. Wood : Tempest: A Substrate for Portable Parallel Programs. COMPCON 1995 : 327-332 30 Shubhendu S. Mukherjee , Shamik D. Sharma , Mark D. Hill, James R. Larus , Anne Rogers , Joel H. Saltz : Efficient Support for Irregular Applications on Distributed-Memory Machines. PPOPP 1995 : 68-79 29 Madhusudhan Talluri , Mark D. Hill, Yousef Y. A. Khalidi : A New Page Table for 64-bit Address Spaces. SOSP 1995 : 184-200 28 David A. Wood , Mark D. Hill: Cost-Effective Parallel Computing. IEEE Computer 28 (2): 69-72 (1995) 27 Ted G. Lewis , Dave Power , Bertrand Meyer , Jack Grimes , Mike Potel , Ronald J. Vetter , Phillip A. Laplante , Wolfgang Pree , Gustav Pomberger , Mark D. Hill, James R. Larus , David A. Wood , Hesham El-Rewini , Bruce W. Weide : Where I Software Headed? A Virtual Roundtable. IEEE Computer 28 (8): 20-32 (1995) 26 Madhusudhan Talluri , Mark D. Hill: Surpassing the TLB Performance of Superpages with Less Operating System Support. ASPLOS 1994 : 171-182 25 Shubhendu S. Mukherjee , Mark D. Hill: An evaluation of directory protocols for medium-scale shared-memory multiprocessors. International Conference on Supercomputing 1994 : 64-74 24 Babak Falsafi , Alvin R. Lebeck , Steven K. Reinhardt , Ioannis Schoinas , Mark D. Hill, James R. Larus , Anne Rogers , David A. Wood : Application-specific protocols for user-level shared memory. SC 1994 : 380-389 23 Richard E. Kessler , Mark D. Hill, David A. Wood : A Comparison of Trace-Sampling Techniques for Multi-Megabyte Caches. IEEE Transactions on Computers 43 (6): 664-675 (1994) 22 David A. Wood , Satish Chandra , Babak Falsafi , Mark D. Hill, James R. Larus , Alvin R. Lebeck , James C. Lewis , Shubhendu S. Mukherjee , Subbarao Palacharla , Steven K. Reinhardt : Mechanisms for Cooperative Shared Memory. ISCA 1993 : 156-167 21 Steven K. Reinhardt , Mark D. Hill, James R. Larus , Alvin R. Lebeck , James C. Lewis , David A. Wood : The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers. SIGMETRICS 1993 : 48-60 20 Andreas Farid Pour , Mark D. Hill: Performance Implications of Tolerating Cache Faults. IEEE Transactions on Computers 42 (3): 257-267 (1993) 19 Sarita V. Adve , Mark D. Hill: A Unified Formalization of Four Shared-Memory Models. IEEE Transactions on Parallel and Distributed Systems 4 (6): 613-624 (1993) 18 Mark D. Hill, James R. Larus , Steven K. Renhardt , David A. Wood : Cooperative Shared Memory: Software and Hardware Support for Scalable Multiprocesors. TOCS 11 (4): 300-318 (1993) 17 Mark D. Hill, James R. Larus , Steven K. Renhardt , David A. Wood : Cooperative Shared Memory: Software and Hardware Support for Scalable Multiprocesors. ASPLOS 1992 : 262-273 16 Madhusudhan Talluri , Shing I. Kong , Mark D. Hill, David A. Patterson : Tradeoffs in Supporting Two Page Sizes. ISCA 1992 : 415-424 15 Kourosh Gharachorloo , Sarita V. Adve , Anoop Gupta , John L. Hennessy , Mark D. Hill: Programming for Different Memory Consistency Models. Journal of Parallel and Distributed Computing 15 (4): 399-407 (1992) 14 Richard E. Kessler , Mark D. Hill: Page Placement Algorithms for Large Real-Indexed Caches. TOCS 10 (4): 338-359 (1992) 13 Sarita V. Adve , Mark D. Hill, Barton P. Miller , Robert H. B. Netzer : Detecting Data Races on Weak Memory Systems. ISCA 1991 : 234-243 12 Sarita V. Adve , Vikram S. Adve , Mark D. Hill, Mary K. Vernon : Comparison of Hardware and Software Cache Coherence Schemes. ISCA 1991 : 298-308 11 Yul H. Kim , Mark D. Hill, David A. Wood : Implementing Stack Simulation for Highly-Associative Memories. SIGMETRICS 1991 : 212-213 10 David A. Wood , Mark D. Hill, Richard E. Kessler : A Model for Estimating Trace-Sample Miss Ratios. SIGMETRICS 1991 : 79-89 9 Sarita V. Adve , Mark D. Hill: Implementing Sequential Consistency in Cache-Based Systems. ICPP (1) 1990 : 47-50 8 Sarita V. Adve , Mark D. Hill: Weak Ordering - A New Definition. ISCA 1990 : 2-14 7 Mark D. Hill, James R. Larus : Cache Considerations for Multiprocessor Programmers. CACM 33 (8): 97-102 (1990) 6 Richard E. Kessler , Richard Jooss , Alvin R. Lebeck , Mark D. Hill: Inexpensive Implementations of Set-Associativity. ISCA 1989 : 131-139 5 Mark D. Hill, Alan Jay Smith : Evaluating Associativity in CPU Caches. IEEE Transactions on Computers 38 (12): 1612-1630 (1989) 4 Mark D. Hill: A Case for Direct-Mapped Caches. IEEE Computer 21 (12): 25-40 (1988) 3 David A. Wood , Susan J. Eggers , Garth A. Gibson , Mark D. Hill, Joan M. Pendleton , Scott A. Ritchie , George S. Taylor , Randy H. Katz , David A. Patterson : An In-Cache Address Translation Mechanism. ISCA 1986 : 358-365 2 Mark D. Hill, Alan Jay Smith : Experimental Evaluation of On-Chip Microprocessor Cache Memories. ISCA 1984 : 158-166 1 David A. Patterson , Phil Garrison , Mark D. Hill, Dimitris Lioupis , Chris Nyberg , Tim Sippel , Korbin Van Dyke : Architecture of a VLSI Instruction Cache for a RISC. ISCA 1983 : 108-116  DiSC'03 © 2003 Association for Computing Machinery |
